Department of Electronic Engineering, National Kaohsiung University of Science and Technology

電子組

丁信文
Hsin-Wen Ting - 電子組

基本資料研究興趣研究計畫重要著作其他資料

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英文名字:Hsin-Wen Ting
分  機:15607
電子郵件:hwting@cc.kuas.edu.tw
學  歷:國立成功大學電機博士(2008)
專  長:

類比與混合信號電路設計、測試與可測試性設計
積體電路設計與電子電路系統應用

丁信文個人資料

經歷:

國立高雄應用科技大學電子工程系副教授(2013/02~)

國立高雄應用科技大學學生事務處課外活動組組長(2013/08~2015/07)

國立高雄應用科技大學電子工程系助理教授(2009/08~2013/01)

國立勤益科技大學電子工程系兼任講師(2005/09~2006/02)

 

學歷:

國立成功大學電機博士(2008)

國立成功大學電機碩士(2004)

國立成功大學電機學士(2002)

 

專長:

1.類比與混合信號電路設計、測試與可測試性設計

2.積體電路設計與電子電路系統應用

 

研究興趣:

1.開發類比與混合信電路應用之測試機制、驗證流程以及驗證用之周邊電路

2.積體電路設計與電子電路系統應用

3.積體電路佈局品質提升

4.半導體測試品質改善系統

 

近五年之研究計畫:

A.科技部

[1]類比積體電路可測試性設計技術開發與應用,106-2221-E-151-050-MY2,主持人,2017/08/01~2019/07/31。

[2]基於FPGA實現之改良型閾值計算電路,106-2813-C-151-018-E,科技部大專學生研究計畫指導老師,2017/07/01~2018/02/28。

[3]多熱點偵測之溫度感應系統與延伸之可測試性技術(II),MOST-105-2221-E-151-064 -,主持人,2016/08/01~2017/08/31。

[4]利用電路轉換技術實現多重信號回復電路,MOST-105-2221-E-151-066-,共同主持人,2016/08/01~2017/10/31。

[5]高速串列鏈路晶片上訊號品質測試技術之研究,MOST-105-2221-E-151-002-,共同主持人,2016/08/01~2017/09/30。

[6]多熱點偵測之溫度感應系統與延伸之可測試性技術(I),MOST-104-2221-E-151-035 -,主持人,2015/08/01~2016/07/31。

[7]考量積體電路分析方法與測試應用之佈局品質提升技術(I),MOST-103-2221-E-151-058 -,主持人,2014/08/01~2015/08/31。

[8]高準確度符號分析技術之開發,MOST-103-2221-E-151-060-,共同主持人,2014/08/01~2015/10/31。

[9]整合佈局優化與晶片溫度效應之類比積體電路可測試性導向設計研究(II),NSC-102-2221-E-151-055-,主持人,2013/08/01~2014/07/31。

[10]整合佈局優化與晶片溫度效應之類比積體電路可測試性導向設計研究(I),NSC-101-2221-E-151-073-,主持人,2012/08/01~2013/08/31。

[11]應用於全差動電路的符號分析之研究,NSC-101-2221-E-151-074-,共同主持人,2012/08/01~2013/10/31。

[12]高效能之電路符號節點分析法,NSC-100-2221-E-151-065-,共同主持人,2011/08/01~2012/10/31。

[13]應用於心電圖模組中類比與混合信號電路之開發(I),NSC-99-2221-E-151-064-,主持人,2010/08/01~2011/07/31。

[14]類比數位轉換器測試理論與方法之開發,NSC-98-2218-E-151-006-,主持人,2009/10/01~2011/01/31。

 

B.產學計畫

[1]消除中高頻音頻雜訊之濾波功能電路實現-太河專業音響有限公司,主持人,2017/08/01~2018/01/31。

[2]觸控應用之類比-數位轉換電路實現-鈞映股份有限公司,主持人,2011/03/01-2011/03/31。

[3]光二極體掃描架構之濾波功能電路實現計畫-響玖股份有限公司,主持人,2010/11/01-2010/12/31。

[4]產學合作校外實習輔導:

(1)奕力科技(2016/07/01~2016/08/31)。

(2)台灣松下電器(2016/07/01~2016/07/31)。

(3)奇景光電(2011/07~2011/09,2015/07~2015/09,2016/07/01~2016/08/31,2017/07/03~2016/08/31)。

(4)京元電子2010/07~2012/07,2017/07~迄今)。

 

C.校內專題研究計畫:

[1] 一種應用於電流引導式數位類比轉換器之線性度內建自我測試電路,2010/06/11-2010/11/31,KUAS-99-WD-001。

 

近五年之重要著作:

A. 期刊論文(Journal/Transaction):

[1] Hsin-Wen Ting* and Chi-Yuan Chen, “A VLSI on-chip analog high-order low-pass filter performance evaluation strategy,” IEEE Trans. Instrum. Meas., vol. 67, pp. 621–633, Mar. 2018. (SCI, EI)

[2] Yen-Long Lee, Yu-Po Cheng, Soon-Jyh Chang, and Hsin-Wen Ting, “A fast and jitter-modulation free jitter tolerance estimation technique for bang-bang CDRs,” IEEE Des. Test., vol. 35, pp. 63–73, Feb. 2018. (SCI, EI)

[3] Hsin-Wen Ting*, Chun-Tse Cheng, and Jyun-Tai Kao, “A design and its practical application of the pseudo two-step successive-approximation register analog-to-digital converter with the active charge transfer technique,” J. Chin. Inst. Eng., vol. 40, pp. 514–524, Sept. 2017. (SCI, EI)

[4] I-Jen Chao, Bin-Da Liu, Soon-Jyh Chang, Chun-Yueh Huang, and Hsin-Wen Ting, “Analyses of splitable amplifier technique and cancellation of memory effect for opamp sharing,” IEEE Trans. Very Large Scale Integr. Syst., vol. 25, pp.621-634, Feb. 2017. (SCI, EI)

[5] Chun-Po Huang, Hsin-Wen Ting, and Soon-Jyh Chang, “Analysis of non-ideal behaviors based on INL/DNL plots for SAR ADCs,” IEEE Trans. Instrum. Meas., vol. 65, pp.1804-1817, Aug. 2016. (SCI, EI)

[6] Hsin-Wen Ting*, “A digital testing strategy for characterizing an analog circuit block,” IEEE Trans. Instrum. Meas., vol. 65, pp.1374-1384, June. 2016. (SCI, EI)

[7] An-Sheng Chao, Cheng-Wu Lin, Hsin.-Wen. Ting, and Soon-Jyh Chang, “A capacitance-ratio quantification design for linearity test in differential top-plate sampling sar ADCS,” Int. J. Circuit Theory Appl., vol. 43, pp. 1333–1350, Oct. 2015. (SCI, EI)

[8] Hsin-Wen Ting* and Yu-Cheng Lin, “A simple voltage-to-frequency converter with modulated duty cycle,” J. Chin. Inst. Eng., vol. 38, pp. 109–119, Feb. 2015. (SCI, EI)

[9] An-Sheng Chao, Cheng-Wu Lin, Hsin-Wen Ting, and Soon-Jyh Chang, “A low-cost stimulus design for linearity test in SAR ADCs,” IEICE Trans. Electron., vol. 97-C, pp. 538-545, June 2014. (SCI, EI)

[10] Hsin-Wen Ting* and Chi-Ming Hsu, “An overkill detection and disposal suggestion system for improving semiconductor testing,” Int’l J. of Electrical Engineering, vol. 20, pp. 179-187, Oct. 2013. (EI)

[11] I-Jen Chao, Chung-Lun Hsu, Bin-Da Liu, Soon-Jyh Chang, Chun-Yueh Huang, and Hsin-Wen Ting, “A third-order low-distortion delta-sigma modulator with opamp sharing and relaxed feedback path timing,” IEICE Trans. Electron., vol. 95-C, pp. 1799-1809, Nov. 2012. (SCI, EI)

[12] Hsin-Wen Ting*, “Digital-compatible testing scheme for operational amplifier,” J. Electron. Test.: Theory Appl., vol. 28, pp. 267-277, June 2012. (SCI, EI)

[13] Ren-Li Chen, Hsin-Wen Ting, and Soon-Jyh Chang, “Six-bit 2.7-GS/s 5.4-mW Nyquist complementary metal-oxide semiconductor digital-to-analogue converter for ultra-wideband transceivers,” IET Circ. Device. Syst., vol. 6, pp. 95-102, Apr. 2012. (SCI, EI)

[14] Hsin-Wen Ting*, “Improvement of stop-band attenuation for the sallen-key low-pass filter,” Int’l J. of Electrical Engineering, vol. 18, pp. 255-263, Dec. 2011. (EI)

[15] Jin-Fu Lin and Hsin-Wen Ting*, “Digital design-for-diagnosis method for error identification of Pipelined ADCs,” J. Electron. Test.: Theory Appl., vol. 27, pp. 697-709, Dec. 2011. (SCI, EI)

[16] Jin-Fu Lin, Soon-Jyh Chang, Te-Chieh Kung, Hsin-Wen Ting, and Chih-Hao Huang, “Transition-code based linearity test method for pipelined ADCs with digital error correction,” IEEE Trans. VLSI Syst., vol. 19, pp. 2158-2169, Dec. 2011. (SCI, EI)

[17] Hsin-Wen Ting*, “An output response analyzer circuit for ADC built-in self-test,” J. Electron. Test.: Theory Appl., vol. 27, pp. 455-464, Aug. 2011. (SCI, EI)

[18] Hsieh-Wei Lee, King-Chu Hung, Bin-Da Liu, Sheau-Fang Lei, and Hsin-Wen Ting, ”Realization of high octave decomposition for breast cancer feature extraction on ultrasound images,” IEEE Trans. Circuit Syst. I, vol. 58, pp. 1287-1299, June 2011. (SCI, EI)

[19] Hsin-Wen Ting*, Soon-Jyh Chang, and Su-Ling Huang, “A design of linearity built-in self-test for current-steering DAC,” J. Electron. Test.: Theory Appl., vol. 27, pp. 85-94, Feb. 2011. (SCI, EI)

[20] Hsin-Wen Ting*, Bin-Da Liu, and Soon-Jyh Chang, “Histogram based testing method for estimating A/D converter performance,” IEEE Trans. Instrum. Meas., vol. 57, pp. 420-427, Feb. 2008. (SCI, EI)

[21] Hsin-Wen Ting *, Cheng-Wu Lin, Bin-Da Liu, and Soon-Jyh Chang, “Oscillator-based reconfigurable sinusoidal signal generator for ADC BIST,” J. Electron. Test.: Theory Appl., vol. 23, pp.549-558, Dec. 2007. (SCI, EI)

B. 研討會論文(Conference):

[1] Chi-Hsien Wu, Jau-Ji Jou, Hsin-Wen Ting, Shao-I Chu, and Bing-Hong Liu “Multi-channel multi-gigabit PRBS generator with a built-in clock in 0.18-μm CMOS technology,” in IEEE Int. SoC Design Conf., Nov. 2017.

[2] Hsin-Wen Ting, Jian-Zhou Yan, Hsin-Ying Wu, Zi-Tao Wu, “A resistor-string digital-to-analog converter based waveform generator,” in Proc. VLSI Test Technology Workshop, July 2017.

[3] Hsin-Ying Wu and Hsin-Wen Ting, “Investigation of 4th-order Butterworth low pass filter circuit to filter heartbeat noises,” in Conf. on Innovation and Technology in Electronics, signal and Communication, May 2017.

[4] Wei-Chih Hsieh and Hsin-Wen Ting, “An example of the design and simulation of the MIPS CPU,” in Conf. on Innovation and Technology in Electronics, signal and Communication, May 2017.

[5] Ngoc-Tu Nguyen, Bing-Hong Liu and ,Hsin-Wen Ting, “Power grids vulnerability assessment under cascading failures,” in Int. Congress on Eng. and Inform., May 2017.

[6] Hsin-Wen Ting, Chi-Yuan Chen, and Hsiu-An Liu, “A Layout Strategy for Reducing the Random Error of Analog Circuit Blocks,” in IEEE Conf. Green Technology and Sustainable Development, Nov. 2016, pp. 24–27.

[7] Hsin-Wen Ting, “An area allocation strategy based on correlation between components and performance of analog circuit blocks,” in Proc. VLSI Test Technology Workshop, July 2016.

[8] Hsiu-An Liu and Hsin-Wen Ting, “A fast transient low dropout voltage linear regulator design under any ESR of load capacitor,” in Conference on Microelectronics Technology & Applications, May 2016, pp. 95-96.

[9] Chi-Yuan Chen and Hsin-Wen Ting, “Low pass filter design for biomedical applications,” in Conference on Microelectronics Technology & Applications, May 2016, pp.91-93.

[10] Hsin-Wen Ting and I-Ying Wu, “Analysis and design of an 8-bit 100MS/s pipelined analog-to-digital converter,” in Conference on Microelectronics Technology & Applications, May 2015, pp. 97-98.

[11] Kang-Hui Peng, Jau-Ji Jou, Tien-Tsorng Shih, Jian-Chiun Liou, and Hsin-Wen Ting, “Design of 10-Gb/s 4-Level Pulse Amplitude Modulation Vertical Cavity Surface Emitting Laser Diode Driver in 0.18-μm CMOS Technology,” in National Symposium on Telecommunications, Nov. 2015.

[12] Hsin-Wen Ting and Wei-Chang Tai, “Design and analysis of low dropout regulator,” in Proceedings of Electronic Technology Symposium, May 2014, pp. 261-264.

[13] Hsin-Wen Ting and Jing-Wein Wang, Yu-Chieh Cho, “A simple CPU with the Capability to Compute Trigonometric Function,” in Proceedings of Electronic Technology Symposium, May 2014, pp. 265-268.

[14] Hsin-Wen Ting and Hsiang-Hao Lee, “Design of a switched-capacitor band-pass filter for low frequency application,” in Proceedings of Conference on Microelectronics Technology and Applications, May 2014, pp. 83-84.

[15] Hsin-Wen Ting and Hung-Yeh Yang, “Realization and discussion of carbon monoxide, temperature, and humidity sensor siren,” in Proceedings of Conference on innovation and technology in Electronics, signal and communication, May 2014, pp. 92.

[16] Hsin-Wen Ting, “A simple testing structure for analog circuits,” in Proc. Inform. Security Intell. Contr., Aug. 2012, pp. 27-30.

[17] Hsin-Wen Ting and Chi-Ming Hsu, “An overkill detection system for improving the testing quality of semiconductor,” in Proc. Inform. Security Intell. Contr., Aug. 2012, pp.31-34.

[18] Hsin-Wen Ting and Cing-Wen Yang, “An infrastructure for analog circuits testing,” in Proc. IEEE Int. Mixed-Signals, Sensors, and Syst. Test Workshop, May 2012, pp. 108-112. (EI)

[19] An-Sheng Chao, Soon-Jyh Chang, and Hsin-Wen Ting, “A SAR ADC BIST for simplified linearity test,” in Proc. IEEE Int SOC Conf., Sep. 2011, pp. 146-149. (EI)

[20] I-Jen Chao, Wei-Chih Chen, Chia-Ming Kuo, Bin-Da Liu, Hsin-Wen Ting, Soon-Jyh Chang, and Chun-Yueh Huang, “A low-distortion relaxed-DEM-timing delta-sigma modulator without extra adder in the quantizer input,” in Proc. 22th VLSI Design/CAD Workshop, Aug. 2011, pp. 480-483.

[21] Hsin-Wen Ting and Hung-Yu Wang, “Improvement of stop-band attenuation for the Sallen-Key low-lass filter,” in Proc. IEEE Int Symp. Next-Generation Electron., Nov. 2010, pp 158-161. (EI)

[22] Ren-Li Chen, Soon-Jyh Chang, and Hsin-Wen Ting, “A low-cost low-power current-steering DAC for UWB transceivers,” in Proc. 21th VLSI Design/CAD Workshop, Aug. 2010, pp. 355-358.

[23] Hsin-Wen Ting, I-Jen Chao, Yu-Chang Lien, Soon-Jyh Chang, and Bin-Da Liu, “A low-cost output response analyzer circuit for ADC BIST,” in Proc. IEEE Testing and Diagnosis. Conf., Apr. 2009, pp. 1-4. (EI)

[24] Hsin-Wen Ting, Bin-Da Liu, and Soon-Jyh Chang, “Histogram based testing strategy for ADC,” in Proc. IEEE Asian Test Symp., Nov. 2006, pp. 51-54. (EI)

[25] Ruei-Jhe Tsai, Hsin-Wen Ting, Chi-Sheng Lin, and Bin-Da Liu, “A CAM/WTA-based high speed and low power longest prefix matching circuit design,” in Proc. IEEE Asia-Pacific Conf. Circuits and Syst., Dec. 2006, pp. 427-430. (EI)

[26] Ruei-Jhe Tsai, Hsin-Wen Ting, Chi-Sheng Lin, and Bin-Da Liu, “A CAM/WTA-based high speed and low power longest prefix matching circuit design,” in Proc. 17th VLSI Design/CAD Workshop, Aug. 2006, pp. 274-277

[27] Hsin-Wen Ting, Cheng-Wu Lin, Bin-Da Liu, and Soon-Jyh Chang, “Reconstructive oscillator based sinusoidal signal generator for ADC BIST,” in Proc. IEEE Asian Solid-State Circuits. Conf., Nov. 2005, pp. 65-68. (EI)

[28] Hsin-Wen Ting, Bin-Da Liu, and Soon-Jyh Chang, “A reconfigurable sinusoidal signal generator for analog-to-digital converter built-in self-test,” in Proc. 16th VLSI Design/CAD Workshop, Aug. 2005.

[29] Hsin-Wen Ting, Bin-Da Liu, and Soon-Jyh Chang, “A time domain built-in self-test methodology for SNDR and ENOB tests of analog-to-digital converters,” in Proc. IEEE Asian Test Symp., Nov. 2004, pp. 52-57. (EI)

[30] Hsin-Wen Ting, Bin-Da Liu, and Soon-Jyh Chang, “An on-chip concurrent high frequency analog and digital sinusoidal signal generator,” in Proc. IEEE Asia-Pacific Conf. Circuits and Syst., Dec. 2004, pp. 173-176. (EI)

 

專利資料:

[1] 劉濱達,丁信文,張順志:「以直方圖為基礎之類比數位轉換器測試方法」中華民國發明專利第I311866號(專利權期間:2009年7月1日至2026年3月19日) ”Testing Method for Analog-to-Digital Converter,” ROC Patent, Patent Number: I311866, (Period: July.1, 2009 – Mar 19, 2026.)

 

榮譽及獎勵:

[1]指導專題學生參加2017年教育部105學年度大學校院積體電路設計競賽大學部全客戶設計組獲得優等二隊與佳作三隊Award of Merit, Full-Custom Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2017

[2]指導專題學生參加2017年奇景盃積體電路佈局競賽獲得最佳團隊獎Himax IC Layout Award, 2017

[3]指導專題學生參加2017年奇景盃積體電路佈局競賽獲得佳作四隊Himax IC Layout Award, 2017

[4]指導專題學生參加106學年度(2017)電子工程系畢業專題比賽,作品名稱:智慧型冰箱之人工智慧暨IOT對冰箱電能消耗之控管之影響,獲得第三名。

[5]指導專題學生參加106學年度(2017)電子工程系畢業專題比賽,獲得佳作二隊。

[6]Innovative Concept Award, GTSD 2016

[7]指導專題學生參加2016年教育部104學年度大學校院積體電路設計競賽大學部全客戶設計組獲得特優一隊、優等一隊與設計完成獎四隊Award of Merit, Full-Custom Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2016

[8]指導專題學生參加2016年奇景盃積體電路佈局競賽獲得優等一隊、佳作一隊與競賽完成獎四隊Himax IC Layout Award, 2016

[9]指導專題學生參加105學年度(2016)電子工程系畢業專題比賽獲得佳作九隊

[10]指導專題學生參加2015年教育部103學年度大學校院積體電路設計競賽大學部全客戶設計組獲得佳作二隊與設計完成獎三隊Award of Merit, Full-Custom Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2015

[11]指導專題學生參加2015年奇景盃積體電路佈局競賽獲得佳作三隊與競賽完成獎九隊Himax IC Layout Award, 2015

[12]指導專題學生參加104學年度(2015)電子工程系畢業專題比賽,作品名稱:改善晶片系統中低壓差線性穩壓器的Q工作點,獲得第二名

[13]指導專題學生參加104學年度(2015)電子工程系畢業專題比賽,獲得佳作十隊

[14]指導研究所學生參加2014年教育部102學年度大學校院積體電路設計競賽研究所/大學類比電路組與大學部全客戶組獲得優等獎一隊Award of Merit, Full-Custom Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2014

[15]指導專題學生參加2014年教育部102學年度大學校院積體電路設計競賽大學部全客戶設計組獲得特優一隊、優等二隊、佳作三隊與設計完成獎一隊Award of Merit, Full-Custom Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2014

[16]指導專題學生參加2014年奇景盃積體電路佈局競賽獲得最佳指導教授獎Himax IC Layout Award, 2014

[17]指導專題學生參加2014年奇景盃積體電路佈局競賽獲得最佳團隊獎Himax IC Layout Award, 2014

[18]指導專題學生參加103學年度(2014)電子工程系畢業專題比賽,作品名稱:適用於攜帶型裝置低功耗連續漸進式類比-數位轉換器,獲得第一名

[19]指導專題學生參加2014年奇景盃積體電路佈局競賽獲得佳作六隊與競賽完成獎四隊Himax IC Layout Award, 2014

[20]國立高雄應用科技大學102學年度電資學院輔導優良教師。

[21]指導專題學生參加2013年教育部101學年度大學校院積體電路設計競賽大學部全客戶設計組獲得優等一隊與佳作三隊Award of Merit, Full-Custom Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2013

[22]指導研究所學生與專題學生參加2013年教育部101學年度大學校院積體電路設計競賽研究所/大學類比電路組與大學部全客戶組獲得設計完整獎三隊Award of Merit, Full-Custom Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2013

[23]指導專題學生參加2013年奇景盃積體電路佈局競賽獲得佳作三隊與競賽完成獎二隊Himax IC Layout Award, 2013

[24]指導專題學生參加102學年度(2013)電子工程系畢業專題比賽獲得佳作一隊

[25]指導專題學生參加2012年教育部100學年度大學校院積體電路設計競賽大學部全客戶組設計獲得優等一隊與佳作三隊Award of Merit, Full-Custom Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2012

[26]指導研究所學生參加2012年教育部100學年度大學校院積體電路設計競賽研究所/大學類比電路組設計佳作一隊Award of Merit, Analog Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2012

[27]指導專題學生參加2012年奇景盃積體電路佈局競賽獲得佳作二隊與競賽完成獎五隊Himax IC Layout Award, 2012

[28]指導專題學生參加101學年度(2012)電子工程系畢業專題比賽,作品名稱:全擺福加法器,獲得第二名

[29]指導專題學生參加101學年度(2012)電子工程系畢業專題比賽,作品名稱:利用CMOS技術實現之主動電感,獲得第三名

[30]指導專題學生參加102學年度(2013)電子工程系畢業專題比賽獲得佳作二隊

[31]指導專題學生參加2011年亞東盃積體電路佈局競賽獲得第三名與佳作五隊OIT IC Layout Award, 2011

[32]指導專題學生參加100學年度(2011)電子工程系畢業專題比賽,作品名稱:梅花型金字塔演算法之電路設計,獲得第一名

[33]指導專題學生參加100學年度(2011)電子工程系畢業專題比賽,作品名稱:內建之類比信號量測電路,獲得第三名

[34]指導專題學生參加100學年度(2011)電子工程系畢業專題比賽獲得佳作一隊

[35]指導專題學生參加2011年教育部99學年度大學校院積體電路設計競賽大學部全客戶設計組獲得優等二隊、佳作一隊與設計完整獎二隊Award of Merit, Full-Custom Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2011

[36]國立高雄應用科技大學99學年度優良導師

[37]指導專題學生參加2011年奇景盃積體電路佈局競賽獲得佳作二隊Himax IC Layout Award, 2011

[38]指導專題學生參加99學年度(2010)電子工程系畢業專題比賽,作品名稱:新型低電壓線性共模前饋式電路,獲得第一名

[39]指導專題學生參加99學年度(2010)電子工程系畢業專題比賽獲得佳作一隊

[40]第21屆VLSI/CAD symposium最佳論文獎Best Paper Award, The 21th VLSI Design/CAD Symposium, Taiwan, 2010

[41]指導專題學生參加2010年教育部98學年度大學校院積體電路設計競賽大學部全客戶設計組獲得佳作二隊與設計完整獎二隊Award of Merit, Full-Custom Circuits Design, National IC Contest, Ministry of Education, Taiwan, 2010

[42]指導專題學生參加2010年奇景盃積體電路佈局競賽獲得次優一隊與佳作三隊Himax IC Layout Award, 2010

[43]斐陶斐榮譽學會會員 Member, The Phi Tau Phi Scholastic Honor Society, 2008

[44]旺宏金矽獎優等獎 Macronix Golden Silicon Award, 2006

[45]柯林論文獎(資訊與通訊科技碩士獎)Lam Research Thesis Award, Lam Research Corporation, 2004

 

專業學術服務工作項目:

A.學會服務:

[1]Treasurer of  IEEE Solid-State Circuits Society (SSCS) Tainan Chapter, Taiwan (2017/01~)

[2]台灣電機電子工程學會(TIEEE)最佳博碩士論文獎審查(2015年)

 

B.國際研討會議程主持人或規劃委員:

[1]Moderator, Advanced Design/Measurement Platform Summit, VLSI Design/CAD Symposium 2017

[2]Program committee, IEEE Green Technology and Sustainable Development Conference (GTSD 2016)

[3]Session Chair & Program committee, VLSI Test Technology Workshop (VTTW 2016)

[4]Program committee, Conference on Innovative Electronics Design and Applications (CIEDA 2015)

[5]Program committee, Conference on Innovative Electronics Design and Applications (CIEDA 2014)

[6]Program committee, VLSI Test Technology Workshop (VTTW 2014)

[7]Program committee, VLSI Test Technology Workshop (VTTW 2013)

[8]Registration Chair & Session Chair, VLSI Test Technology Workshop (VTTW 2012)

[9]Session Chair, VLSI Test Technology Workshop (VTTW 2011)

[10]Affair committee member, IPPR Conference on Vision, Graphics, and Image Processing (CVGIP 2010)

[11]Session Chair, International Conference on Innovative Computing, Information and Control (ICICIC 2009)

 

C.擔任國際期刊與研討會審稿人(2009~迄今):

[1]IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2015、2014

[2]IEEE Transactions on Circuits and Systems I (TCAS-I), 2015、2014

[3]IEEE Transactions on Circuits and Systems II (TCAS-II), 2017, 2015、2014、2013、2012、2011、2010

[4]IEEE Transactions on Industrial Electronics: 2017

[5]IET Electronics Letters: 2018

[6]Journal of Electronic Testing: Theory and Applications (JETTA), 2018、2017、2014、2012、2011

[7]Journal of Electrical and Computer Engineering, 2016

[8]International Journal of Electronics, 2015

[9]Proceedings of the National Academy of Sciences, India Section A: Physical Sciences, 2015

[10]Circuits, Systems & Signal Processing, 2014

[11]Electronics and Telecommunications Research Institute Journal (ETRI Journal), 2012、2011、2010

[12]VLSI Test Technology Workshop (VTTW 2016、2014、2012、2011、2010)

[13]Conference on Innovative Electronics Design and Applications (CIEDA 2014)

[14]IEEE International Conference on Computer and Communication Technology (ICCCT 2013)

[15]IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2016、APCCAS 2012)

[16]IEEE Biomedical Circuits and Systems Conference (BioCAS 2012)

[17]IEEE International Symposium on Circuits and Systems (ISCAS 2011)

[18]IEEE International Symposium on Next-Generation Electronics (ISNE 2010)

[19]IPPR Conference on Vision, Graphics, and Image Processing (CVGIP 2010)

[20]International Conference on High-Speed Circuits Design (HSCD 2010)

 

D.擔任博士班論文口試委員:

[1]國立高雄應用科技大學電子工程系(2016年度1位、2015年度1位)。

[2]國立成功大學電機工程系口試委員(2017年度2位、2014年度1位)。

 

E.擔任碩士班論文口試委員:

[1]國立成功大學電機工程系口試委員(2017年5位、2016年2位、2015年2位、2014年6位、2013年7位、2012年6位、2011年4位、2010年3位)。

[2]國立中正大學電機工程系口試委員(2016年1位)。

[3]國立中山大學電機工程系口試委員(2017年5位、2016年1位、2015年3位、2014年3位、2013年3位)。

[4]國立高雄應用科技大學電子工程系口試委員(2016年2位、2015年1位、2014年4位、2013年3位、2012年7位、2011年1位)。

[5]國立嘉義大學電機工程系口試委員(2016年1位)。

[6]國立台北科技大學機電整合所員口試委員(2014年4位)。

[7]南台科技大學電子工程系口試委員(2014年2位)。

 

F.輔導學生取得證照:

[1]IC設計能力鑑定證照(經濟部工業局委託財團法人國家實驗研究院國家晶片系統設計中心CIC發證)

(1).2017年度:3人

(2).2016年度:6人

(3).2015年度:6人

(4).2014年度:7人

(5).2013年度:14人